Implemented using Antigravity and it actually works!
This commit is contained in:
@@ -0,0 +1,604 @@
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#include "../../Headers/SagittariusInternal.h"
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#include "../../Headers/SagittariusPanic.h"
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#include <stdbool.h>
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#include <string.h>
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#include <math.h>
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/* Safe register read/write helpers */
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static inline void reg_read(SagittariusCore *core, uint8_t reg_idx, void *dest, sagittarius_type t) {
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size_t sz = 0;
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switch (t) {
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case st_uint8: case st_int8: sz = 1; break;
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case st_uint16: case st_int16: sz = 2; break;
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case st_uint32: case st_int32: case st_single: sz = 4; break;
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case st_uint64: case st_int64: case st_double: sz = 8; break;
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}
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memcpy(dest, &core->reg.head[reg_idx], sz);
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}
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static inline void reg_write(SagittariusCore *core, uint8_t reg_idx, const void *src, sagittarius_type t) {
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size_t sz = 0;
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switch (t) {
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case st_uint8: case st_int8: sz = 1; break;
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case st_uint16: case st_int16: sz = 2; break;
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case st_uint32: case st_int32: case st_single: sz = 4; break;
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case st_uint64: case st_int64: case st_double: sz = 8; break;
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}
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memcpy(&core->reg.head[reg_idx], src, sz);
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}
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/* Macro for math2 (add, sub, mul) */
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#define MATH2_OP_IMPL(name, op) \
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internal bool SagMath2##name(SagittariusCore *core, sagittarius_type t, uint8_t L, uint8_t R, uint8_t T) { \
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switch (t) { \
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case st_uint8: { uint8_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_uint16: { uint16_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_uint32: { uint32_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_uint64: { uint64_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_int8: { int8_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_int16: { int16_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_int32: { int32_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_int64: { int64_t l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_single: { float l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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case st_double: { double l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = l op r; reg_write(core, T, &res, t); break; } \
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default: return false; \
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} \
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return true; \
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}
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MATH2_OP_IMPL(Add, +)
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MATH2_OP_IMPL(Sub, -)
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MATH2_OP_IMPL(Mul, *)
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#define DIV_CASE(st_type, c_type) \
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case st_type: { \
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c_type l, r, res; \
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reg_read(core, L, &l, t); \
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reg_read(core, R, &r, t); \
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if (r == 0) { \
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if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_Generic, "Division by zero"); \
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return false; \
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} \
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res = l / r; \
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reg_write(core, T, &res, t); \
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break; \
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}
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#define DIV_FLOAT_CASE(st_type, c_type) \
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case st_type: { \
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c_type l, r, res; \
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reg_read(core, L, &l, t); \
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reg_read(core, R, &r, t); \
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res = l / r; \
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reg_write(core, T, &res, t); \
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break; \
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}
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internal bool SagMath2Div(SagittariusCore *core, sagittarius_type t, uint8_t L, uint8_t R, uint8_t T) {
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switch (t) {
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DIV_CASE(st_uint8, uint8_t)
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DIV_CASE(st_uint16, uint16_t)
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DIV_CASE(st_uint32, uint32_t)
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DIV_CASE(st_uint64, uint64_t)
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DIV_CASE(st_int8, int8_t)
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DIV_CASE(st_int16, int16_t)
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DIV_CASE(st_int32, int32_t)
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DIV_CASE(st_int64, int64_t)
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DIV_FLOAT_CASE(st_single, float)
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DIV_FLOAT_CASE(st_double, double)
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default: return false;
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}
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return true;
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}
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#define MOD_CASE(st_type, c_type) \
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case st_type: { \
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c_type l, r, res; \
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reg_read(core, L, &l, t); \
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reg_read(core, R, &r, t); \
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if (r == 0) { \
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if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_Generic, "Modulo by zero"); \
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return false; \
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} \
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res = l % r; \
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reg_write(core, T, &res, t); \
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break; \
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}
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internal bool SagMath2Mod(SagittariusCore *core, sagittarius_type t, uint8_t L, uint8_t R, uint8_t T) {
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switch (t) {
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MOD_CASE(st_uint8, uint8_t)
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MOD_CASE(st_uint16, uint16_t)
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MOD_CASE(st_uint32, uint32_t)
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MOD_CASE(st_uint64, uint64_t)
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MOD_CASE(st_int8, int8_t)
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MOD_CASE(st_int16, int16_t)
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MOD_CASE(st_int32, int32_t)
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MOD_CASE(st_int64, int64_t)
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case st_single: { float l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = fmodf(l, r); reg_write(core, T, &res, t); break; }
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case st_double: { double l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = fmod(l, r); reg_write(core, T, &res, t); break; }
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default: return false;
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}
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return true;
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}
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#define POW_CASE(st_type, c_type) \
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case st_type: { \
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c_type l, r, res; \
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reg_read(core, L, &l, t); \
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reg_read(core, R, &r, t); \
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res = (c_type)pow((double)l, (double)r); \
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reg_write(core, T, &res, t); \
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break; \
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}
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internal bool SagMath2Pow(SagittariusCore *core, sagittarius_type t, uint8_t L, uint8_t R, uint8_t T) {
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switch (t) {
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POW_CASE(st_uint8, uint8_t)
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POW_CASE(st_uint16, uint16_t)
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POW_CASE(st_uint32, uint32_t)
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POW_CASE(st_uint64, uint64_t)
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POW_CASE(st_int8, int8_t)
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POW_CASE(st_int16, int16_t)
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POW_CASE(st_int32, int32_t)
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POW_CASE(st_int64, int64_t)
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case st_single: { float l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = powf(l, r); reg_write(core, T, &res, t); break; }
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case st_double: { double l, r, res; reg_read(core, L, &l, t); reg_read(core, R, &r, t); res = pow(l, r); reg_write(core, T, &res, t); break; }
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default: return false;
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}
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return true;
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}
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internal bool Math2Op(SagittariusCore *core, SagittariusInst inst) {
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uint8_t t = (inst.data >> 8) & 0xFF;
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uint8_t op = (inst.data >> 16) & 0xFF;
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uint8_t L = (inst.data >> 24) & 0xFF;
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uint8_t R = (inst.data >> 32) & 0xFF;
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uint8_t T = (inst.data >> 40) & 0xFF;
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bool status = false;
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switch (op) {
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case sag_math2_add: status = SagMath2Add(core, (sagittarius_type)t, L, R, T); break;
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case sag_math2_sub: status = SagMath2Sub(core, (sagittarius_type)t, L, R, T); break;
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case sag_math2_mul: status = SagMath2Mul(core, (sagittarius_type)t, L, R, T); break;
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case sag_math2_div: status = SagMath2Div(core, (sagittarius_type)t, L, R, T); break;
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case sag_math2_mod: status = SagMath2Mod(core, (sagittarius_type)t, L, R, T); break;
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case sag_math2_pow: status = SagMath2Pow(core, (sagittarius_type)t, L, R, T); break;
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default: return false;
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}
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if (status) {
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core->pc += 8;
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}
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return status;
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}
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/* Math1 unary operators helper */
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static inline double my_abs(double v) { return v < 0 ? -v : v; }
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static inline float my_absf(float v) { return v < 0 ? -v : v; }
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#define MATH1_OP_IMPL(name, func, float_func) \
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internal bool SagMath1##name(SagittariusCore *core, sagittarius_type t, uint8_t L, uint8_t T) { \
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switch (t) { \
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case st_uint8: { uint8_t l, res; reg_read(core, L, &l, t); res = (uint8_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_uint16: { uint16_t l, res; reg_read(core, L, &l, t); res = (uint16_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_uint32: { uint32_t l, res; reg_read(core, L, &l, t); res = (uint32_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_uint64: { uint64_t l, res; reg_read(core, L, &l, t); res = (uint64_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_int8: { int8_t l, res; reg_read(core, L, &l, t); res = (int8_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_int16: { int16_t l, res; reg_read(core, L, &l, t); res = (int16_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_int32: { int32_t l, res; reg_read(core, L, &l, t); res = (int32_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_int64: { int64_t l, res; reg_read(core, L, &l, t); res = (int64_t)func((double)l); reg_write(core, T, &res, t); break; } \
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case st_single: { float l, res; reg_read(core, L, &l, t); res = float_func(l); reg_write(core, T, &res, t); break; } \
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case st_double: { double l, res; reg_read(core, L, &l, t); res = func(l); reg_write(core, T, &res, t); break; } \
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default: return false; \
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} \
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return true; \
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}
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MATH1_OP_IMPL(Sin, sin, sinf)
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MATH1_OP_IMPL(Cos, cos, cosf)
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MATH1_OP_IMPL(Tan, tan, tanf)
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MATH1_OP_IMPL(Sinh, sinh, sinhf)
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MATH1_OP_IMPL(Cosh, cosh, coshf)
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MATH1_OP_IMPL(Tanh, tanh, tanhf)
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MATH1_OP_IMPL(Asin, asin, asinf)
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MATH1_OP_IMPL(Acos, acos, acosf)
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MATH1_OP_IMPL(Atan, atan, atanf)
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MATH1_OP_IMPL(Abs, my_abs, my_absf)
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MATH1_OP_IMPL(Exp, exp, expf)
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internal bool Math1Op(SagittariusCore *core, SagittariusInst inst) {
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uint8_t t = (inst.data >> 8) & 0xFF;
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uint8_t op = (inst.data >> 16) & 0xFF;
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uint8_t L = (inst.data >> 24) & 0xFF;
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uint8_t T = (inst.data >> 32) & 0xFF;
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bool status = false;
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switch (op) {
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case sag_math1_sin: status = SagMath1Sin(core, (sagittarius_type)t, L, T); break;
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case sag_math1_cos: status = SagMath1Cos(core, (sagittarius_type)t, L, T); break;
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case sag_math1_tan: status = SagMath1Tan(core, (sagittarius_type)t, L, T); break;
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case sag_math1_sinh: status = SagMath1Sinh(core, (sagittarius_type)t, L, T); break;
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case sag_math1_cosh: status = SagMath1Cosh(core, (sagittarius_type)t, L, T); break;
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case sag_math1_tanh: status = SagMath1Tanh(core, (sagittarius_type)t, L, T); break;
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case sag_math1_asin: status = SagMath1Asin(core, (sagittarius_type)t, L, T); break;
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case sag_math1_acos: status = SagMath1Acos(core, (sagittarius_type)t, L, T); break;
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case sag_math1_atan: status = SagMath1Atan(core, (sagittarius_type)t, L, T); break;
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case sag_math1_abs: status = SagMath1Abs(core, (sagittarius_type)t, L, T); break;
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case sag_math1_exp: status = SagMath1Exp(core, (sagittarius_type)t, L, T); break;
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default: return false;
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}
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if (status) {
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core->pc += 8;
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}
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return status;
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}
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/* CVT (Conversion) */
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#define CVT_CASE_SRC(src_c_type, src_t) \
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case src_t: { \
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src_c_type val; \
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reg_read(core, src_reg, &val, src_t); \
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switch (dst_type) { \
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case st_uint8: { uint8_t r = (uint8_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_uint16: { uint16_t r = (uint16_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_uint32: { uint32_t r = (uint32_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_uint64: { uint64_t r = (uint64_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_int8: { int8_t r = (int8_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_int16: { int16_t r = (int16_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_int32: { int32_t r = (int32_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_int64: { int64_t r = (int64_t)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_single: { float r = (float)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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case st_double: { double r = (double)val; reg_write(core, dst_reg, &r, dst_type); break; } \
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} \
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break; \
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}
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internal bool SagCvt(SagittariusCore *core, SagittariusInst inst) {
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uint8_t src_reg = (inst.data >> 8) & 0xFF;
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uint8_t src_type = (inst.data >> 16) & 0xFF;
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uint8_t dst_reg = (inst.data >> 24) & 0xFF;
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uint8_t dst_type = (inst.data >> 32) & 0xFF;
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switch ((sagittarius_type)src_type) {
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CVT_CASE_SRC(uint8_t, st_uint8)
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CVT_CASE_SRC(uint16_t, st_uint16)
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CVT_CASE_SRC(uint32_t, st_uint32)
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CVT_CASE_SRC(uint64_t, st_uint64)
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CVT_CASE_SRC(int8_t, st_int8)
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CVT_CASE_SRC(int16_t, st_int16)
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CVT_CASE_SRC(int32_t, st_int32)
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CVT_CASE_SRC(int64_t, st_int64)
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CVT_CASE_SRC(float, st_single)
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CVT_CASE_SRC(double, st_double)
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default: return false;
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}
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core->pc += 8;
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return true;
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}
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/* Set, Mv, Cp, Save, Load */
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internal bool SagSet(SagittariusCore *core, SagittariusInst inst) {
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uint8_t length = (inst.data >> 8) & 0xFF;
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uint8_t reg_idx = (inst.data >> 16) & 0xFF;
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if (core->pc + 15 >= core->memory->size) {
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if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_OOB, "Set payload out of bounds");
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return false;
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}
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uint64_t payload = 0;
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memcpy(&payload, &core->memory->data[core->pc + 8], 8);
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if (length > 8) length = 8;
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memcpy(&core->reg.head[reg_idx], &payload, length);
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core->pc += 16;
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return true;
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}
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internal bool SagMv(SagittariusCore *core, SagittariusInst inst) {
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uint8_t length = (inst.data >> 8) & 0xFF;
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uint8_t src_reg = (inst.data >> 16) & 0xFF;
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uint8_t dst_reg = (inst.data >> 24) & 0xFF;
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if (length > 8) length = 8;
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memmove(&core->reg.head[dst_reg], &core->reg.head[src_reg], length);
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core->pc += 8;
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return true;
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}
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internal bool SagCp(SagittariusCore *core, SagittariusInst inst) {
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uint8_t length = (inst.data >> 8) & 0xFF;
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uint8_t src_reg = (inst.data >> 16) & 0xFF;
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uint8_t dst_reg = (inst.data >> 24) & 0xFF;
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if (length > 8) length = 8;
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memcpy(&core->reg.head[dst_reg], &core->reg.head[src_reg], length);
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core->pc += 8;
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return true;
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}
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internal bool SagSave(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t length = (inst.data >> 8) & 0xFF;
|
||||
uint8_t src_reg = (inst.data >> 16) & 0xFF;
|
||||
uint8_t dest_mem_ptr_reg = (inst.data >> 24) & 0xFF;
|
||||
|
||||
uint64_t mem_addr = 0;
|
||||
memcpy(&mem_addr, &core->reg.head[dest_mem_ptr_reg], 8);
|
||||
|
||||
if (mem_addr + length > core->memory->size) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_OOB, "Memory write out of bounds");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (length > 8) length = 8;
|
||||
memcpy(&core->memory->data[mem_addr], &core->reg.head[src_reg], length);
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
|
||||
internal bool SagLoad(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t length = (inst.data >> 8) & 0xFF;
|
||||
uint8_t dest_reg = (inst.data >> 16) & 0xFF;
|
||||
uint8_t src_mem_ptr_reg = (inst.data >> 24) & 0xFF;
|
||||
|
||||
uint64_t mem_addr = 0;
|
||||
memcpy(&mem_addr, &core->reg.head[src_mem_ptr_reg], 8);
|
||||
|
||||
if (mem_addr + length > core->memory->size) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_OOB, "Memory read out of bounds");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (length > 8) length = 8;
|
||||
memcpy(&core->reg.head[dest_reg], &core->memory->data[mem_addr], length);
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Control flow: Jmp, JmpIf, Call, Ret */
|
||||
internal bool SagJmp(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t mode = (inst.data >> 8) & 0xFF; // 0 = absolute, 1 = relative
|
||||
uint8_t val_mode = (inst.data >> 16) & 0xFF; // 0 = register, 1 = immediate
|
||||
|
||||
uint64_t target_val = 0;
|
||||
if (val_mode == 0) {
|
||||
uint8_t reg_idx = (inst.data >> 24) & 0xFF;
|
||||
memcpy(&target_val, &core->reg.head[reg_idx], 8);
|
||||
} else {
|
||||
int32_t imm;
|
||||
memcpy(&imm, &((uint8_t*)&inst.data)[3], 4);
|
||||
target_val = (int64_t)imm; // Sign extended
|
||||
}
|
||||
|
||||
if (mode == 0) {
|
||||
core->pc = target_val;
|
||||
} else {
|
||||
core->pc += target_val;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
internal bool SagJmpIf(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t mode = (inst.data >> 8) & 0xFF;
|
||||
uint8_t val_mode = (inst.data >> 16) & 0xFF;
|
||||
uint8_t flag_reg = (inst.data >> 24) & 0xFF;
|
||||
|
||||
uint8_t flag = 0;
|
||||
memcpy(&flag, &core->reg.head[flag_reg], 1);
|
||||
|
||||
if (flag != 0) {
|
||||
uint64_t target_val = 0;
|
||||
if (val_mode == 0) {
|
||||
uint8_t reg_idx = (inst.data >> 32) & 0xFF;
|
||||
memcpy(&target_val, &core->reg.head[reg_idx], 8);
|
||||
} else {
|
||||
int32_t imm;
|
||||
memcpy(&imm, &((uint8_t*)&inst.data)[4], 4);
|
||||
target_val = (int64_t)imm; // Sign extended
|
||||
}
|
||||
|
||||
if (mode == 0) {
|
||||
core->pc = target_val;
|
||||
} else {
|
||||
core->pc += target_val;
|
||||
}
|
||||
} else {
|
||||
core->pc += 8;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
internal bool SagCall(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t mode = (inst.data >> 8) & 0xFF;
|
||||
uint8_t val_mode = (inst.data >> 16) & 0xFF;
|
||||
uint8_t reg_to_rem = (inst.data >> 24) & 0xFF;
|
||||
|
||||
if (val_mode == 0) {
|
||||
uint8_t reg_idx = (inst.data >> 32) & 0xFF;
|
||||
uint64_t target_pc = 0;
|
||||
memcpy(&target_pc, &core->reg.head[reg_idx], 8);
|
||||
|
||||
uint64_t ret_pc = core->pc + 8;
|
||||
memcpy(&core->reg.head[reg_to_rem], &ret_pc, 8);
|
||||
|
||||
if (mode == 0) {
|
||||
core->pc = target_pc;
|
||||
} else {
|
||||
core->pc += target_pc;
|
||||
}
|
||||
} else {
|
||||
if (core->pc + 15 >= core->memory->size) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_OOB, "Call payload out of bounds");
|
||||
return false;
|
||||
}
|
||||
uint64_t target_pc = 0;
|
||||
memcpy(&target_pc, &core->memory->data[core->pc + 8], 8);
|
||||
|
||||
uint64_t ret_pc = core->pc + 16;
|
||||
memcpy(&core->reg.head[reg_to_rem], &ret_pc, 8);
|
||||
|
||||
if (mode == 0) {
|
||||
core->pc = target_pc;
|
||||
} else {
|
||||
core->pc += target_pc;
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
internal bool SagRet(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t reg_to_restore = (inst.data >> 8) & 0xFF;
|
||||
uint64_t target_pc = 0;
|
||||
memcpy(&target_pc, &core->reg.head[reg_to_restore], 8);
|
||||
core->pc = target_pc;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Compare */
|
||||
#define CMP_CASE(st_type, c_type, sz) \
|
||||
case st_type: { \
|
||||
c_type l, r; \
|
||||
reg_read(core, L, &l, (sagittarius_type)t); \
|
||||
reg_read(core, R, &r, (sagittarius_type)t); \
|
||||
switch (op) { \
|
||||
case 0: res = (l == r); break; \
|
||||
case 1: res = (l != r); break; \
|
||||
case 2: res = (l < r); break; \
|
||||
case 3: res = (l <= r); break; \
|
||||
case 4: res = (l > r); break; \
|
||||
case 5: res = (l >= r); break; \
|
||||
default: res = 0; break; \
|
||||
} \
|
||||
break; \
|
||||
}
|
||||
|
||||
internal bool SagCmp(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t t = (inst.data >> 8) & 0xFF;
|
||||
uint8_t op = (inst.data >> 16) & 0xFF;
|
||||
uint8_t L = (inst.data >> 24) & 0xFF;
|
||||
uint8_t R = (inst.data >> 32) & 0xFF;
|
||||
uint8_t T = (inst.data >> 40) & 0xFF;
|
||||
|
||||
uint8_t res = 0;
|
||||
switch ((sagittarius_type)t) {
|
||||
CMP_CASE(st_uint8, uint8_t, 1)
|
||||
CMP_CASE(st_uint16, uint16_t, 2)
|
||||
CMP_CASE(st_uint32, uint32_t, 4)
|
||||
CMP_CASE(st_uint64, uint64_t, 8)
|
||||
CMP_CASE(st_int8, int8_t, 1)
|
||||
CMP_CASE(st_int16, int16_t, 2)
|
||||
CMP_CASE(st_int32, int32_t, 4)
|
||||
CMP_CASE(st_int64, int64_t, 8)
|
||||
CMP_CASE(st_single, float, 4)
|
||||
CMP_CASE(st_double, double, 8)
|
||||
default: return false;
|
||||
}
|
||||
memcpy(&core->reg.head[T], &res, 1);
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* MathV (Vector Math) */
|
||||
internal bool SagMathV(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t w = (inst.data >> 8) & 0xFF;
|
||||
uint8_t h = (inst.data >> 16) & 0xFF;
|
||||
uint8_t op = (inst.data >> 24) & 0xFF;
|
||||
uint8_t L_ptr_reg = (inst.data >> 32) & 0xFF;
|
||||
uint8_t R_ptr_reg = (inst.data >> 40) & 0xFF;
|
||||
uint8_t Dest_ptr_reg = (inst.data >> 48) & 0xFF;
|
||||
|
||||
uint64_t l_addr = 0, r_addr = 0, d_addr = 0;
|
||||
memcpy(&l_addr, &core->reg.head[L_ptr_reg], 8);
|
||||
memcpy(&r_addr, &core->reg.head[R_ptr_reg], 8);
|
||||
memcpy(&d_addr, &core->reg.head[Dest_ptr_reg], 8);
|
||||
|
||||
uint64_t size_in_bytes = (uint64_t)w * h * 8;
|
||||
if (l_addr + size_in_bytes > core->memory->size ||
|
||||
r_addr + size_in_bytes > core->memory->size ||
|
||||
d_addr + size_in_bytes > core->memory->size) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_OOB, "Vector math OOB access");
|
||||
return false;
|
||||
}
|
||||
|
||||
for (uint64_t i = 0; i < (uint64_t)w * h; ++i) {
|
||||
double l_val = 0, r_val = 0, d_val = 0;
|
||||
memcpy(&l_val, &core->memory->data[l_addr + i * 8], 8);
|
||||
memcpy(&r_val, &core->memory->data[r_addr + i * 8], 8);
|
||||
switch (op) {
|
||||
case 0: d_val = l_val + r_val; break;
|
||||
case 1: d_val = l_val - r_val; break;
|
||||
case 2: d_val = l_val * r_val; break;
|
||||
case 3: {
|
||||
if (r_val == 0.0) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_Generic, "Vector division by zero");
|
||||
return false;
|
||||
}
|
||||
d_val = l_val / r_val;
|
||||
break;
|
||||
}
|
||||
default: d_val = 0; break;
|
||||
}
|
||||
memcpy(&core->memory->data[d_addr + i * 8], &d_val, 8);
|
||||
}
|
||||
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Halt */
|
||||
internal bool SagHalt(SagittariusCore *core, SagittariusInst inst) {
|
||||
(void)core; (void)inst;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Syscall & TSyscall */
|
||||
internal bool SagSyscall(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t ns_reg = (inst.data >> 8) & 0xFF;
|
||||
uint8_t func_reg = (inst.data >> 16) & 0xFF;
|
||||
|
||||
uint64_t ns = 0, func_id = 0;
|
||||
memcpy(&ns, &core->reg.head[ns_reg], 8);
|
||||
memcpy(&func_id, &core->reg.head[func_reg], 8);
|
||||
|
||||
uint64_t syscall_id = (ns << 32) | func_id;
|
||||
|
||||
bool found = false;
|
||||
for (uint64_t i = 0; i < core->vm->SagittariusSyscallCount; ++i) {
|
||||
if (core->vm->SagittariusSyscallEntries[i].id == syscall_id) {
|
||||
core->vm->SagittariusSyscallEntries[i].syscall(core);
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!found) {
|
||||
if (core->vm->panic_handler) core->vm->panic_handler(core, Sagittarius_Msg_Unknown, "Unregistered syscall called");
|
||||
return false;
|
||||
}
|
||||
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
|
||||
internal bool SagTSyscall(SagittariusCore *core, SagittariusInst inst) {
|
||||
uint8_t ns_reg = (inst.data >> 8) & 0xFF;
|
||||
uint8_t func_reg = (inst.data >> 16) & 0xFF;
|
||||
uint8_t result_reg = (inst.data >> 24) & 0xFF;
|
||||
|
||||
uint64_t ns = 0, func_id = 0;
|
||||
memcpy(&ns, &core->reg.head[ns_reg], 8);
|
||||
memcpy(&func_id, &core->reg.head[func_reg], 8);
|
||||
|
||||
uint64_t syscall_id = (ns << 32) | func_id;
|
||||
|
||||
uint8_t result = 0;
|
||||
for (uint64_t i = 0; i < core->vm->SagittariusSyscallCount; ++i) {
|
||||
if (core->vm->SagittariusSyscallEntries[i].id == syscall_id) {
|
||||
result = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
memcpy(&core->reg.head[result_reg], &result, 1);
|
||||
core->pc += 8;
|
||||
return true;
|
||||
}
|
||||
Reference in New Issue
Block a user